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Advanced Encryption Standard (AES)

It is designed to use only simple byte (8-bits) operations. This makes AES implementations possible even on very simple microcontrollers. The encryption of a data block is composed of an initial XOR step with a temporary key, several round of  transformations (depending on the key or block size) and an additional rounds are performed at the end with one round step omitted as per the standard AES algorithm.

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Data Encryption Standard (DES)

Algorithm is a block cipher that transforms 64-bit data blocks under a 64-bit secret key, by means of permutation and substitution. It is officially described in FIPS PUB 46. A new encryption algorithm, Triple DES was proposed as an alternate to DES.

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Computer Assisted Protection Plug Testing Equipment

Computer assisted Testing Equipment is for testing the functional parameters of the protection plug, like Continuity, DC Spark Over voltage, trip time and resistance imbalance this will include recording the Test results. This should preferably be compatible with MFG-Pro functionalities. The equipment should be fully integrated with a PC.

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The Universal Asynchronous Receiver and Transmitter (UART)

Core provides a means of serial communication between system implemented on FPGA and external device. The UART supports separate FIFOs in transmit and receive paths. The UART core does not provide flow control.

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Vedlabs

#24,2nd Floor, CMH Road,
Indira Nagar 2nd Stage.
Bangalore-560038
Tel: 080-42040494

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